Cadence Design Systems
AUSDIA is now part of Cadence
Cadence Design Systems
AUSDIA is now part of Cadence

Careers

Accelerate you career! We are looking for experienced,
innovative engineers to join our growing team.

C++ R&D Engineer

Location: Sunnyvale, CA
Posted: May 3rd, 2018

Position Description:

- Applicants must have demonstrated knowledge of C++ and STL (at least 5 years of experience)
- EDA professional experience, specially static timing analysis is a big plus
- MSCENG, MSEE, MSCS or equivalent
- Knowledge of Boost, TCL, and Perforce is a big plus.
- Must be able to work independently in a fast paced start-up environment and with minimal supervision.

About Ausdia

Ausdia is a fast-paced, growing company that is the leader in timing constraints generation, verification, management and CDC analysis. We're looking for dynamic, innovative, self-starting individuals who want to take a larger-than-life role in making their organizations & themselves a success.

This is a full-time employee position. Ausdia offers competitive salaries, health insurance benefits, and employee stock options. All work will be performed at our Sunnyvale, CA office; however, some telecommuting may be available for exceptional candidates.

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